1. Field of the Invention
The present invention relates to electrically programmable non-volatile semiconductor memory devices and a method of writing data therein.
2. Description of the Related Art
In semiconductor integrated circuits, non-volatile one-time programmable (OTP) memories are essential elements. OTP memories do not lose stored data even when the power supply is turned off. OTP memories are widely used in a variety of applications including redundancies of large-capacity memories such as DRAM and SRAM, tuning of analog circuits, storing codes such as cipher keys, a historical record in a manufacturing process, and a chip ID for storing management information.
For the memory redundancy application, a ROM including a laser fuse that irreversibly stores information by being fused by a laser light has been used as it is a most inexpensive non-volatile memory.
The laser fuse ROM requires, however, a special fuse-blow device and a blow process using the device, thus resulting in associated high test cost. In the laser fuse, the minimum dimension depends on the wavelength of the laser light. The laser fuse thus cannot be reduced in dimension in the same way as the other circuit portions and has come to occupy a relatively larger area than the other circuit portions. The laser fuse can be programmed only in a wafer-level programming, due to the above-described programming method. It is thus hard to perform redundancy remedy in a high-speed test after packaging, a built-in self-repair by a test circuit mounted in a chip, and the like. Conventional systems that comprise the laser fuse are now required to mount electrically-programmable non-volatile memories.
Conventional systems including a plurality of chips can store various types of information in independent EEPROM chips. However, a system on chip (SoC) including a system integrated on a single chip needs to have a non-volatile memory on the same chip. Inclusion of a non-volatile memory that accumulate charges in a floating gate will increase the cost of the SoC chip due to an additional associated mask and process.
Some information such as memory redundancy information stored in the non-volatile memory does not need to be rewritten frequently. Therefore, OTP memories which can be manufactured by the current standard CMOS processes, are required in a wide variety of application.
A memory element used in OTP memories that stores information by irreversibly changing the element characteristics will be collectively referred to as a fuse element hereinbelow. Some of the fuse elements electrically and irreversibly change the element characteristics. Those fuse elements will be collectively referred to as an electrical fuse (eFuse).
One of the eFuse elements that may be manufactured in the standard CMOS processes is a gate-insulating film breakdown antifuse OTP memory. This type of memory applies a high voltage to a gate-insulating film of a MOSFET to cause a dielectric breakdown, thus forming a conductive spot that reduces the resistance of the element. A fuse element that has a high resistance when unprogrammed and has a low resistance when programmed will also be referred to as an antifuse. It is defined below that the antifuse stores data “0” when it is unprogrammed and has a high resistance, and stores data “1” when it is programmed and has a low resistance.
Conventional OTP memories using a gate-insulating film breakdown type antifuse OTP memory are described in a non-patent document 1 (“A 65 nm Pure CMOS One-time Programmable Memory Using a Two-Port Antifuse Cell Implemented in a Matrix Structure,” pp. 211-215, IEEE Asian Solid-State Circuits Conference 2007). The non-patent document 1 includes a PMOSFET gate-insulating film as an antifuse and a high-voltage power-supply circuit for programming disposed outside a memory array.
Relatively-large data such as a microcomputer program is stored in a mask ROM or a flash memory in a conventional art. Programs are frequently updated during research and development, but are rarely changed during a mass production process. Frequent software update while the product in use is required only in highly advanced systems.
A mask ROMs can be manufactured at the lowest cost, but can reduce its production cost only when it is manufactured in a large-scale, because it is produced as a special part of a particular product. In addition, every change of the software requires a change in mask design in its production process. The development cost and time thus increase, which may miss the good timing to introduce the products into the market.
The flash memories need additional production processes compared to standard CMOS processes. Therefore, it requires associated cost in development of the additional processes and manufacturing cost thereof, which will result in high cost except it is used in advanced systems.
If, therefore, conventional non-volatile memories such as the mask ROM and the flash memory can be replaced by OTP memories, many products can reduce the process-development cost, the product-development cost, and the manufacturing cost.
Recent software incorporated in a chip has become complicated and reached a megabit-order data scale. The programming time of OTP memories during the manufacturing process may thus be an issue.
In conventional gate-insulating film breakdown antifuse OTP memories, the built-in charge pump generates a high voltage for programming bit by bit.
It is understood that the OTP memory program includes two stages: the first stage of the high voltage application resulting in the gate-insulating film breakdown; and the second stage of a subsequent programming current generating a joule heat effect that forms a low resistance current path.
A higher programming voltage results in faster breakdown. However, the programming voltage should not be increased inmoderately because of the limit in a boosting ability of a charge pump and the transistor breakdown voltage. Considering the programming disturb problem that unprogrammed memory cells undergoing the voltage stress may cause characteristic degradation such as increase in leak current, the appropriate time of the direct high-voltage stress is about micro-second order per one bit (one memory cell). The breakdown of the gate-insulating film depends on a probability process. For example, when a certain program voltage is applied such that half of memory cells are broken down within 1 micro-second, the other half of the memory cells may require 10 micro-seconds or 100 micro-seconds to be broken down by the program voltage. Accordingly, the program time may be set longer, taking a margin into consideration. To ensure that the data programming is completed, a verify operation and a verify circuit are required. A verify operation includes a read operation after programming, and a re-programming operation when there is an unprogrammed memory cell left.
The bit-by-bit programming time of the OTP memory may be micro-second order when the memory has a few-kilobit capacity. However, there arises a bottleneck when the memory has a megabit order capacity.
As described above, it is difficult to reduce the breakdown time per one memory cell. It is necessary to concurrently program a plurality of memory cells to reduce the total programming time (a multi-bit concurrent programming). In the multi-bit concurrent programming, a programming voltage is applied to the common terminal of the antifuse. Some of the individual terminals of the concurrently-programmed memory cells are held at a high voltage and the others are held at a low voltage depending on the programmed data (“0” or “1”).
A memory cell (antifuse element) with an individual terminal held at the high voltage undergoes a lower voltage stress, thus resulting in no significant characteristic degradation in the programming time such as increase in leak current.
An antifuse element with an individual terminal held at the low voltage undergoes a higher voltage stress and breaks down, followed by a continuous current. As the multi-bit concurrent programming progresses, more antifuse elements break down causing more programming current to flow. Increase in the programming current reduces the programming voltage applied to the common terminal and increases the breakdown time of the remaining unprogrammed antifuse elements. Specifically, there is a problem that an ability of a current supply circuit for supplying the programming current limits the number of concurrently-programmable bits, thereby preventing the expected reduction of the programming time.